A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance.
This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations − going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues – from high-level behavioural modelling in MATLAB/SIMULINK, to circuit-level implementation in Cadence Design FrameWork II. As well as being a comprehensive reference to the theory, the book is also unique in that it gives special importance on practical issues, giving a detailed description of the different steps that constitute the whole design flow of sigma-delta ADCs.
The book begins with an introductory survey of sigma-delta modulators, their fundamentals architectures and synthesis methods covered in Chapter 1. In Chapter 2, the effect of main circuit error mechanisms is analysed, providing the necessary understanding of the main practical issues affecting the performance of sigma-delta modulators. The knowledge derived from the first two chapters is presented in the book as an essential part of the systematic top-down/bottom-up synthesis methodology of sigma-delta modulators described in Chapter 3, where a time-domain behavioural simulator named SIMSIDES is described and applied to the high-level design and verification of sigma-delta ADCs. Chapter 4 moves farther down from system-level to the circuit and physical level, providing a number of design recommendations and practical recipes to complete the design flow of sigma-delta modulators. To conclude the book, Chapter 5 gives an overview of the state-of-the-art sigma-delta ADCs, which are exhaustively analysed in order to extract practical design guidelines and to identify the incoming trends, design challenges as well as practical solutions proposed by cutting-edge designs.
Key Features
- A comprehensive and systematic description of Σ∆M architectures from the basic operating principles to state-of-the-art advances in architectures and circuits, and considering both switched-capacitor and continuous-time circuit implementations.
- A detailed review of state-of-the-art Σ∆M ICs, extracting statistical and empirical design guidelines, identifying trends, design challenges and solutions.
- Case studies showing the different stages of the design flow of Σ∆Ms.
- A complete description of SIMSIDES (SIMulink Sigma-Delta Simulator), a time-domain behavioral simulator for the high-level sizing and verification of Σ∆Ms, implemented in MATLAB/SIMULINK.
- A number of electronic resources (available through a companion website) including practical examples using SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and simulation test benches.
Using a pedagogical and intuitive approach, this is an essential guide for designers of mixed-signal circuits in nanometer CMOS. It doubly serves as a self-contained reference for researchers, designers and non-experienced engineers wanting to acquire an insight into Σ∆Ms and for undergraduate and graduate students in electronics engineering.
Contents
1 Introduction to ΣΔ Modulators: Basic Concepts and Fundamentals
- 1.1 Basics of A/D Conversion
- 1.2 Basics of Sigma-Delta Modulators
- 1.3 Classification of ΣΔ Modulators
- 1.4 Single-Loop ΣΔ Modulators
- 1.5 Cascade ΣΔ Modulators
- 1.6 Multibit ΣΔ Modulators
- 1.7 Band-Pass ΣΔ Modulators
- 1.8 Continuous-Time ΣΔ Modulators
- 1.9 Summary
- 2.1 Nonidealities in Switched-Capacitor ΣΔ Modulators
- 2.2 Finite Amplifier Gain in SC-ΣΔMs
- 2.3 Capacitor Mismatch in SC-ΣΔMs
- 2.4 Integrator Settling Error in SC-ΣΔMs
- 2.5 Circuit Noise in SC-ΣΔMs
- 2.6 Clock Jitter in SC-ΣΔMs
- 2.7 Sources of Distortion in SC-ΣΔMs
- 2.8 Nonidealities in Continuous-Time ΣΔ Modulators
- 2.9 Clock Jitter in CT-ΣΔMs
- 2.10 Excess Loop Delay in CT-ΣΔMs
- 2.11 Quantizer Metastability in CT-ΣΔMs
- 2.12 Finite Amplifier Gain in CT-ΣΔMs
- 2.13 Time-Constant Error in CT-ΣΔMs
- 2.14 Finite Integrator Dynamics in CT-ΣΔMs
- 2.15 Circuit Noise in CT-ΣΔMs
- 2.16 Sources of Distortion in CT-ΣΔMs
- 2.17 Case Study: High-Level Sizing of a ΣΔM
- 2.18 Summary
- 3.1 Systematic Design Methodology of ΣΔ Modulators
- 3.2 Simulation Approaches for the High-Level Evaluation of ΣΔMs
- 3.3 Implementing ΣΔM Behavioral Models
- 3.4 Efficient Behavioral Modeling of ΣΔM Building Blocks using C-MEX S-Functions
- 3.5 SIMSIDES: A SIMULINK-Based Behavioral Simulator for ΣΔMs
- 3.6 Using SIMSIDES for the High-Level Sizing and Verification of ΣΔMs
- 3.7 Summary
- 4.1 Macromodeling ΣΔMs
- 4.2 Including Noise in Transient Electrical Simulations of ΣΔMs
- 4.3 Processing ΣΔM Output Results of Electrical Simulations
- 4.4 Design Considerations and Simulation Test Benches of ΣΔM Basic Building Blocks
- 4.5 Auxiliary ΣΔM Building Blocks
- 4.6 Layout Design, Floorplanning, and Practical Issues
- 4.7 Chip Package, Test PCB, and Experimental Set-Up
- 4.8 Summary
- 5.1 Overview of the State of the Art on ΣΔMs
- 5.2 Empirical and Statistical Analysis of State-of-the-Art ΣΔMs
- 5.3 Cutting-Edge ΣΔM Architectures and Techniques
- 5.4 Classification of State-of-the-Art References
- 5.5 Summary
- A.1 Getting Started: Installing and Running SIMSIDES
- A.2 Building and Editing ΣΔM Architectures in SIMSIDES
- A.3 Analyzing ΣΔMs in SIMSIDES
- A.4 Example
- A.5 Getting Help
- B.1 Overview of SIMSIDES Libraries
- B.2 Ideal Libraries
- B.3 Real SC Building-Block Libraries
- B.4 Real SI Building-Block Libraries
- B.5 Real CT Building-Block Libraries
- B.6 Real Quantizers and Comparators
- B.7 Real D/A Converters
- B.8 Auxiliary Blocks
- Index
About the Author
- Dr José M. de la Rosa, Institute of Microelectronics of Seville, IMSE-CNM (CSIC and University of Seville), Spain. He has been with the Institute of Microelectronics of Seville and the Department of Electronics and Electromagnetism of the University of Seville, where he is an Associate Professor, since 1995. His main research interests are in the field of mixed-signal integrated circuits, especially high-performance data converters. He has participated in a number of National and European R&D projects and has co-authored 3 books and more than 130 international papers, including journal and conference papers and book chapters. In 2005 he was co-chair of the International Conference on VLSI Circuits and Systems - SPIE's 2nd International Symposium on Microtechnologies. He has also been a lecturer in different graduate courses on Microelectronics, particularly on mixed-signal design and modeling, including doctorate programs, invited lectures and IEEE conference tutorials.
- Dr Rocío del Río, Institute of Microelectronics of Seville, IMSE-CNM (CSIC and University of Seville), Spain. He joined the Department of Electronics and Electromagnetism at the University of Seville in 1995, where she currently is an Associate Professor. She has also been with the Institute of Microelectronics of Seville of the Spanish Microelectronics Center since 1995. Her main research interests are in the field of mixed-signal integrated circuit design, especially sigma-delta analog-to-digital converters, including analysis, modeling, and computer-aided design. She has participated in several national and European R&D projects and has co-authored more than 90 international scientific publications, including journal and conference papers, book chapters and the book CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design (Springer, 2006).
Book Details
- Hardcover: 432 pages
- Publisher: Wiley-IEEE Press; 3 edition (May 6, 2013)
- Language: English
- ISBN-10: 1119979250
- ISBN-13: 978-1119979258
- Product Dimensions: 9.9 x 6.9 x 1 inches
- List Price: $120.00